Silicon (Si) is the most widely used semiconductor material, and has been for many years. Due to intense commercial interest and resulting research and development, silicon device technology has reached an advanced level, and in fact, many believe that silicon power deices are approaching the theoretical maximum power limit predicted for this material. Further refinements in this material are not likely to yield substantial improvements in performance, and as a result, development efforts have shifted in focus to the development of other wide bandgap semiconductors as replacements for silicon.
Silicon carbide (SiC) has many desirable properties for high voltage, high frequency and high temperature applications. More particularly, SiC has a large critical electric field (10 times higher than that of Si), a large bandgap (3 times that of Si), a large thermal conductivity (4 times that of Si) and a large electron saturation velocity (twice that of Si). These properties support the theory that SiC will excel over conventional power device applications, such as MOSFETs, SiC n-channel enhancement mode MOSFETs, etc.
Generally, in order to use silicon carbide substrates as the basis for semiconductor devices, such as MOSFETs, an oxide layer must be formed on the SiC substrate. Although theoretically, the oxide can be formed on either the C-face or the Si-face of the SiC crystal, epitaxial layers grown on the C-face are not commercially available and so, MOSFET devices on 0001-Si face 4H—SiC are most sought after.
The performance of these devices is predominantly affected by the on-resistance of the channel, for power devices around and below 2 KV. The channel on-resistance, in turn, is largely controlled by the electron mobility in the inversion layer. Unfortunately, SiC MOSFETs fabricated on the Si-face of a SiC substrate have shown poor inversion layer mobility, which typically results in large power dissipation and loss of efficiency.
The mobility, and furthermore the stability of the gate attributes over the expected life of the device, are largely controlled by the poor interface between the gate oxide and the silicon carbide substrate through which the current conduction occurs. Specifically, the interface between the gate oxide and the SiC substrate may typically have a large number of interface traps, or defects, which in various ways interact with electrons moving through the inversion channel.
It would thus be desirable to provide such devices with improved inversion layer mobility, as well as a lower density of defects at the gate oxide/SiC interface.